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Testonica Lab

RECENT DEVELOPMENT PROJECT EXAMPLES >> European Space Agency: 8-core LEON3 processor on FPGA with integrated real-time failure avoidance, health management system, and optimized telemetry // CERN: Full-stack development from FPGA to GUI of custom Bit Error Rate Test equipment on FPGA for testing and certification of communication channels of LHC/CMS // European Spallation Source (ESS/ERIC): EtherCAT device design based on Beckhoff Xilinx IP and Beckhoff Slave Stack, embedded multi-board SoC-FPGA-based control system with high-availability and remote management.

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Booth's code: A08-A10